MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202611090795 A) filed by Rajesh Kumar; Aniket Bharti; Sonica Upadhyay; Arpita Sharma; Sweta Sharma; and Bhawna Mishra on July 26, 2026, for A Method For Fabricating Planarized Interdigitated Electrode Structures Via Confined Shearing And Devices Thereof.

Inventors include Rajesh Kumar; Aniket Bharti; Sonica Upadhyay; Arpita Sharma; Sweta Sharma; and Bhawna Mishra.

The application for the patent was published on September 18, 2026, under issue no. 38/2026.

Abstract: The present invention discloses a method for fabricating a planarized interdigitated electrode (IDE) structure under ambient conditions without utilizing cleanroom photolithography or high-vacuum deposition steps, by providing a rigid, electrically insulating substrate, mechanically incising a plurality of micro-trenches directly into a top matrix surface of said insulating substrate utilizing a mechanical patterning tool along a predefined tracking toolpath to form an interdigitated electrode pattern having a predefined active tracking footprint and a predefined inter-finger gap spacing, cleaning the incised insulating substrate via multi-stage ultrasonic processing to remove loose particulate debris and structural micro-shards from the micro-trenches, depositing a viscous, electrically conductive paste material possessing a high metal loading factor over the interdigitated electrode pattern of the substrate, applying a localized mechanical shearing force by sweeping a rigid doctor blade across the substrate surface at a controlled acute angle under constant downward pressure to drive the conductive paste material deep into the recessed micro-trenches.

Disclaimer: Curated by HT Syndication.