MUMBAI, India, July 31 -- Intellectual Property India has published a patent application (202411099048 A) filed by Nexperia B. V. on December 14, 2024, for A Continuous Time Comparator With Improved Propagation Delay For A Given Current.
Inventors include Rahul Shaw; and Gaurav Bahirvani.
The application for the patent was published on July 24, 2026, under issue no. 30/2026.
Abstract: A continuous time comparator, comprising a first Field Effect Transistor, FET, (Mn1) arranged for receiving a first input signal, and a second FET (Mn2) arranged for receiving a second input signal, two branches, a first of said two branches comprises a first transistor (Mp1) and a second of said two branches comprises a second transistor (Mp2), wherein said first of said two branches is connected to said first FET (Mn1) and wherein said second of said two branches is connected to said second FET (Mn2), a first dynamic clamp circuitry connected in parallel over said first branch, wherein said first dynamic clamp circuitry is arranged to dynamically clamp a voltage at a gate of a first output transistor (Mp4), and a second dynamic clamp circuitry connected in parallel over said second branch, wherein said second dynamic clamp circuitry is arranged to dynamically clamp a voltage at a gate of a second output transistor (Mp3), said first and second output transistors (Mp3, Mp4) for providing an output of said comparator and for providing an inverting output of said comparator.
Disclaimer: Curated by HT Syndication.
