MUMBAI, India, Sept. 28 -- Intellectual Property India has published a patent application (202641111620 A) filed by Vignan'S Nirula Institute Of Technology And Science For Women on September 17, 2026, for A 16-Bit Reversible Lfsr For Dsp Applications.
Inventors include P. Balakrishna; M. Divyasree; M. Geetha Sowmya; D. Leela Krishnaveni; N. V. Rajyalakshmi; Sk. Rizwana; Sk. Sheeba Shareen; M. Jwalitha; K. Charishma; and T. Anusha.
The application for the patent was published on September 25, 2026, under issue no. 39/2026.
Abstract: A reversible Linear Feedback Shift Register (LFSR) circuit is disclosed. The circuit comprises a plurality of cascaded reversible shift-register stages, each realised using a Feynman (CNOT) gate configured to shift a data bit from a preceding stage to a succeeding stage in response to a clock signal; and a reversible feedback network, constructed using one or more of a Feynman gate, a Peres gate, a Fredkin gate and a Toffoli gate, configured to combine outputs taken from a plurality of tap positions of the cascaded stages by reversible XOR operations, in accordance with a characteristic polynomial, so as to generate a feedback bit. The feedback bit is supplied to the input of the first stage, such that the circuit generates a pseudo-random output sequence at each clock cycle while maintaining a one-to-one correspondence between circuit inputs and outputs, thereby reducing Quantum Cost, Garbage Outputs and Ancilla Inputs relative to conventional irreversible LFSR designs.
Disclaimer: Curated by HT Syndication.
