MUMBAI, India, Feb. 27 -- Intellectual Property India has published a patent application (202631020432 A) filed by Jis College Of Engineering, Kalyani, West Bengal, on Feb. 21, for 'telemetry for edge-ai and flexible pv organisations soc for solar-geostationary satellites.'
Inventor(s) include Mr. Subhodip Koley; Mr. Pronay Pal; Rudra Samanta; Shibani Debnath; Jaya Bhattacharjee; Jayashree Dhara; Indra Prtibha; and Kajal Kumari.
The application for the patent was published on Feb. 27, under issue no. 09/2026.
According to the abstract released by the Intellectual Property India: "We present a monolithic, radiation-hardened geostationary satellite system-on-chip (SoC) featuring adaptive PV power management, high-resolution telemetry aggregation, and artificial intelligence inference. The SoC features a bank of digitally controlled MPPT regulators with high-efficiency GaN switches, a quad-core RISC-V control cluster, and convolutional and transformer accelerators that produce 512 GFLOPS under 5 W. A multi-channel telemetry fabric collects data from temperature, radiation, voltage, and current sensors at 50 kSps. The data is then sent to AI accelerators, which employ pre-trained neural networks to classify anomalies, predict solar-array deterioration, and predict eclipses. Over the course of a 15-year mission, inference findings are used to adjust PV string operating points in real-time, guaranteeing 98% power-tracking efficiency. By removing ground-station analytics latency, housekeeping down-link bandwidth is reduced by more than 90%. Radiation robustness is provided by FD-SOI body-bias techniques rated to 125 krad (Si) total-ionizing dose, triple-modular-redundant logic, and periodic configuration-memory cleaning. A hardware root-of-trust is used to authenticate over-the-air firmware and model upgrades, ensuring safe mission profile and solar cycle adaptation. The concept is a major enabler for next-generation high-throughput GEO satellites since it integrates edge AI and adaptive power regulation in a single die, lowering the number of printed circuit boards, the subsystem bulk by 1.8 kg, the launch cost, and the operating costs."
Disclaimer: Curated by HT Syndication.
