MUMBAI, India, Feb. 6 -- Intellectual Property India has published a patent application (202641007180 A) filed by Cvr College Of Engineering, Hyderabad, Telangana, on Jan. 24, for 'tail current biased sense amplifier design for high speed memory storage applications..'
Inventor(s) include Racha Ganesh; and Rishika Viswanath Bairoju.
The application for the patent was published on Feb. 6, under issue no. 06/2026.
According to the abstract released by the Intellectual Property India: "The portable, high-speed, and low-power data computations require fast memory access to retrieve a large amount of data. This process requires the design of a sophisticated memory unit, which will help in accessing the data at a faster rate. The memory data is accessed by using either voltage or current sensing amplification. The current sensing is preferable at lower technology nodes of semiconductors with greater strength of logic level values. This approach provides an integrated design of a current mirror and NMOS tail-based sense amplifier suitable for SRAM memory cell data retrieval. The design works with current mirroring and amplification for reading logic-1, and NMOS tail circuitry with single or multiple transistors for reading logic-0. The results show that the design can be used for reading good logic-1 and logic-0 values with a faster data rate."
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