MUMBAI, India, Jan. 9 -- Intellectual Property India has published a patent application (202541134553 A) filed by Indian Institute Of Technology, Hyderabad, Telangana, on Dec. 31, 2025, for 'system and method of performing multiplication on a processor system without using a hardware multiplier.'
Inventor(s) include Rajesh Kedia; and Shalu Prathmesh Rajiv.
The application for the patent was published on Jan. 9, under issue no. 02/2026.
According to the abstract released by the Intellectual Property India: "The present invention discloses a processor system and method for performing multiplication on a processor core without using a dedicated hardware multiplier. The processor system includes a processor core configured to execute an instruction set. The system includes a leading-one detection unit integrated with the processor core. The leading-one detection unit executes a hardware-implemented leading-one detector (LOD) instruction that generates an LOD-output indicating a position of a most-significant set bit of an operand. The system includes at least one approximate multiplication routine (108) executable by the processor core and configured to compute LOD-outputs of the first operand and the second operand. The processor core computes an approximate product of a first operand and a second operand using shift and add operations derived from the respective LOD-outputs. The approximate multiplication routines produce a numerically approximate product while consuming fewer processor cycles than exact software-emulated multiplication."
Disclaimer: Curated by HT Syndication.
