MUMBAI, India, Feb. 6 -- Intellectual Property India has published a patent application (202521123436 A) filed by Sandesh Subhash Moralwar; Viraj Basavaraj Mathapati; Akhilesh Ramesh Mane; Medha Vishwanath Wyawahare; and Milind Eknath Rane, Pune, Maharashtra, on Dec. 8, 2025, for 'single cycle risc-v processor..'
Inventor(s) include Sandesh Subhash Moralwar; Viraj Basavaraj Mathapati; Akhilesh Ramesh Mane; Medha Vishwanath Wyawahare; and Milind Eknath Rane.
The application for the patent was published on Feb. 6, under issue no. 06/2026.
According to the abstract released by the Intellectual Property India: "This invention presents a Single-Cycle RISC-V Processor, a 32-bit processor architecture designed to execute every instruction within a single clock cycle, achieving high performance with minimal hardware complexity. The processor adheres to the open-source RISC-V instruction set architecture (ISA) and integrates core components such as the program counter, instruction memory, control unit, register file, arithmetic logic unit (ALU), data memory, and immediate generator into a unified data path. All control signals are generated through combinational logic, eliminating the need for microprogramming or pipelining. The design ensures deterministic execution, reduced latency, and ease of verification, making it highly suitable for embedded systems, FPGA implementations, and educational applications. The invention offers a scalable and efficient foundation for future processor enhancements and research in digital hardware design."
Disclaimer: Curated by HT Syndication.
