MUMBAI, India, April 20 -- Intellectual Property India has published a patent application (202647042328 A) filed by Qualcomm Incorporated, San Diego, on April 2, for 'row-hammer condition mitigation using a physically adjacent row mapping table.'
Inventor(s) include Tran, Sang; Vuong, Hung; and Zhang, Rongtian.
The application for the patent was published on April 17, under issue no. 16/2026.
According to the abstract released by the Intellectual Property India: "In some aspects, an apparatus includes a processing system that includes one or more processors and one or more memories coupled to the one or more processors. The processing system is configured to send one or more memory access commands to a volatile memory. The one or more memory access commands are associated with a first address. The processing system if further configured to access, based on detecting a rowhammer condition associated with the one or more memory access commands, a physically adjacent row mapping table to determine at least a second address. The first address and the second address correspond to physically adjacent rows within the volatile memory. The processing system if further configured to send one or more row refresh commands to the volatile memory based on the row-hammer condition. The one or more row refresh commands are associated with at least the second address."
The patent application was internationally filed on Oct. 07, 2024, under International application No.PCT/US2024/050206.
Disclaimer: Curated by HT Syndication.
