MUMBAI, India, July 25 -- Intellectual Property India has published a patent application (202547067728 A) filed by Xilinx Inc., San Jose, U.S.A., on July 16, for 'noc routing in a multi-chip device.'
Inventor(s) include Gupta Aman; Srinivasan Krishnan; Ansari Ahmad R.; and Ahmad Sagheer.
The application for the patent was published on July 25, under issue no. 30/2025.
According to the abstract released by the Intellectual Property India: "Embodiments herein describe a multi-chip device that includes multiple ICs with interconnected NoCs. Embodiments herein provided address translation circuitry in the ICs. The address translation circuitry establish a hierarchy where traffic originating for a first IC that is intended for a destination on a second IC is first routed to the address translation circuitry on the second IC which then performs an address translation and inserts the traffic back on the NoC in the second IC but with a destination ID corresponding to the destination. In this manner, the IC can have additional address apertures only to route traffic to the address translation circuitry of the other ICs rather than having address apertures for every destination in the other ICs."
The patent application was internationally filed on Oct. 19, 2023, under International application No.PCT/US2023/035541.
Disclaimer: Curated by HT Syndication.