MUMBAI, India, Oct. 11 -- Intellectual Property India has published a patent application (202517081176 A) filed by Murata Manufacturing Co. Ltd., Kyoto, Japan, on Aug. 27, for 'multilayer ceramic capacitor.'
Inventor(s) include Hirai, Kenta.
The application for the patent was published on Oct. 10, under issue no. 41/2025.
According to the abstract released by the Intellectual Property India: "[Problem] To provide a multilayer ceramic capacitor capable of suppressing occurrence of cracks generated inside a laminate due to electrostriction when a high voltage is applied. [Solution] A multilayer ceramic capacitor according to the present invention has: a laminate formed of an inner layer part that includes a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers, that includes a first main surface and a second main surface facing each other in the height direction being the lamination direction of the plurality of dielectric layers, a first lateral surface and a second lateral surface facing each other in the width direction orthogonal to the height direction, and a first end surface and a second end surface facing each other in the length direction orthogonal to the height direction and the width direction, and that is obtained by alternately laminating the dielectric layers and the internal electrode layers, and an outer layer part disposed so as to sandwich the inner layer part from the first main surface side and the second main surface side; a first external electrode disposed on the first end surface; and a second external electrode disposed on the second end surface. The inner layer part is formed of inner dielectric layers among the plurality of dielectric layers disposed in the inner layer part. The inner dielectric layers contain voids. The inner dielectric layers have a width-direction center part-side dielectric layer disposed in a region of a center part in the width direction of the inner layer part, and a width-direction end part-side dielectric layer disposed in a region of an end part in the width direction of the inner layer part. The amount of voids contained in the width-direction end part-side dielectric layer is less than the amount of voids in the width-direction center part-side dielectric layer."
The patent application was internationally filed on Mar. 27, 2024, under International application No.PCT/JP2024/012176.
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