MUMBAI, India, Jan. 2 -- Intellectual Property India has published a patent application (202541122952 A) filed by Vellore Institute Of Technology, Vellore, Tamil Nadu, on Dec. 5, 2025, for 'machine learning system for vlsi physical design runtime prediction.'
Inventor(s) include Dr. Sakthivel Ramachandran; and Mr. Poorna Chandra Reddy M.
The application for the patent was published on Jan. 2, under issue no. 01/2026.
According to the abstract released by the Intellectual Property India: "The present disclosure provides a machine learning system for predicting runtime of VLSI physical design stages. The system includes a data collection module configured to extract design parameters from VLSI designs processed through electronic design automation tools, a machine learning module having regression models trained to predict runtime for physical design stages using the extracted design parameters, and a prediction output module configured to generate runtime predictions based on input design parameters using the trained regression models. The design parameters include cell count, cell area, total area, leakage power, dynamic power, total power, and synthesis runtime. The physical design stages include floorplanning, placement, and routing. The regression models include gradient boosting regression achieving coefficient of determination scores exceeding 0.9 for routing predictions. The system enables automated forecasting of execution times to facilitate improved project scheduling and resource allocation in electronic design automation workflows."
Disclaimer: Curated by HT Syndication.
