MUMBAI, India, Feb. 13 -- Intellectual Property India has published a patent application (202541004846 A) filed by Agnit Semiconductors Private Limited, Bengaluru, Karnataka, on Jan. 21, 2025, for 'lithography-enhanced vertically and laterally tapered iii nitride hemts (vlt hemts) and manufacturing methods thereof.'
Inventor(s) include Sandeep Kumar; Kritika Sur; Mukundh M Srivathsan; Terirama Thingujam; Hareesh Chandrasekar; and Digbijoy N Nath.
The application for the patent was published on Feb. 13, under issue no. 07/2026.
According to the abstract released by the Intellectual Property India: "The invention relates to a novel GaN High Electron Mobility Transistor (HEMT) design featuring a tapered gate structure that enhances linearity and performance in high-frequency applications. The tapered gate design, with a wider end and a narrower end, allows for differential plasma etching, resulting in a continuously varying barrier thickness across the gate width. This variation enables precise modulation of the threshold voltage, leading to a flatter transconductance profile and improved gain stability. A key aspect of the invention is the use of standard lithography and etching techniques to achieve the tapered geometry, ensuring compatibility with existing manufacturing processes. The process includes simulation and analysis steps to optimize the gate's performance, followed by potential fabrication of a physical prototype. This innovative design addresses the limitations of conventional GaN HEMTs, offering enhanced linearity suitable for 5G communication, radar systems, and satellite technology."
Disclaimer: Curated by HT Syndication.
