MUMBAI, India, May 1 -- Intellectual Property India has published a patent application (202641048417 A) filed by Srinivasa Ramanujan Institute Of Technology; Dr. S. Nagaraju; N. Nazia; D. Harshiya; and D. Gajendra, Ananthapuramu, Andhra Pradesh, on April 16, for 'high-speed multi-channel uart using amba and apb protocol on fpga.'
Inventor(s) include Srinivasa Ramanujan Institute Technology; Dr. S. Nagaraju; N. Nazia; D. Harshiya; and D. Gajendra.
The application for the patent was published on May 1, under issue no. 18/2026.
According to the abstract released by the Intellectual Property India: "High-Speed Multi-Channel UART Using AMBA and APB Protocol on FPGA Abstract: This invention presents a high-speed multi-channel Universal Asynchronous Receiver Transmitter (UART) architecture integrated with the Advanced Peripheral Bus (APB) under the AMBA protocol and implemented on an FPGA platform. Conventional UART designs used in embedded and System-on-Chip (SoC) systems often face limitations in achieving higher data rates and handling multiple communication channels simultaneously. These constraints may result in increased processor involvement, communication delays, and reduced overall system efficiency. The proposed architecture addresses these challenges by incorporating multi-channel support, interrupt-driven communication, and programmable baud rate generation derived from the system clock. The integration with the APB interface enables structured register access and seamless connectivity between the processor and peripheral modules. An asynchronous FIFO buffering mechanism is included to ensure reliable data transfer and to prevent loss during high-speed communication. The design is described using hardware description language and validated on an FPGA device to evaluate functional correctness and performance. Experimental analysis demonstrates improved data throughput, reduced latency, and stable operation at elevated baud rates. The proposed system provides a scalable and efficient communication solution suitable for modern high-speed embedded and SoC applications."
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