MUMBAI, India, April 17 -- Intellectual Property India has published a patent application (202641043739 A) filed by Kharidu Hari Krishna; and Dr. V. Sudha, Tiruchirapalli, Tamil Nadu, on April 6, for 'fpga-based pseudo random number generator using eeg signals for resource-constrained cryptographic systems.'
Inventor(s) include Kharidu Hari Krishna; and Dr. V. Sudha.
The application for the patent was published on April 17, under issue no. 16/2026.
According to the abstract released by the Intellectual Property India: "A hardware-efficient pseudo-random number generator (PRNG) based on electroencephalogram (EEG) signals is disclosed. The proposed system extracts entropy from EEG datasets by utilizing the least significant bits (LSBs) of EEG samples and generating binary sequences through a reduced-complexity modulo operation. The architecture is implemented on FPGA platforms using a controller-datapath model, minimizing hardware utilization while maintaining statistical randomness. The generated random bits are used to construct cryptographic keys for lightweight image encryption using XOR operations. The system passes standard randomness tests and demonstrates suitability for secure applications in resource-constrained environments such as IoT devices."
Disclaimer: Curated by HT Syndication.
