MUMBAI, India, Jan. 9 -- Intellectual Property India has published a patent application (202511114953 A) filed by Chandigarh University, Mohali, Punjab, on Nov. 21, 2025, for 'fine-grained bitwise memory allocator for efficient systems.'
Inventor(s) include Dr. Raman Chadha; Aditya Kumar Singh; Abhinay Rana; Kundan Kumar; and Sumit Kumar.
The application for the patent was published on Jan. 9, under issue no. 02/2026.
According to the abstract released by the Intellectual Property India: "The present invention discloses a system and method for dynamic bit-level memory allocation that eliminates inefficiencies of traditional byte-based allocators. The invention dynamically determines the exact number of bits required to represent a value and allocates only that number from a bit-addressable memory pool. It incorporates encoding, decoding, metadata tracking, and garbage collection mechanisms to maintain optimal memory usage. The invention is adaptable for operating systems, embedded systems, and resource-constrained devices such as IoT nodes and edge computing platforms, offering substantial memory savings and runtime efficiency."
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