MUMBAI, India, March 14 -- Intellectual Property India has published a patent application (202617013869 A) filed by Google Llc, Mountain View, U.S.A., on Feb. 9, for 'computational latencies of end-to-end models by large reduction of the number of encoder output frames.'
Inventor(s) include Prabhavalkar, Rohit Prakash; Meng, Zhong; Wang, Weiran; Stooke, Adam Michael; Cai, Xingyu; He, Yanzhang; Narayanan, Arun; Sainath, Tara N; Mengibar, Pedro J. Moreno; and Hwang, Dongseong.
The application for the patent was published on March 13, under issue no. 11/2026.
According to the abstract released by the Intellectual Property India: "A method (600) includes receiving a sequence of encoder input frames (110) as input to an end-to-end model (200). The method also includes generating a sequence of encoder output frames (302) based on the sequence of encoder input frames using an encoder (300) of the end-to-end model. The encoder includes a stack of multi-head attention blocks (320) arranged to apply an encoder reduction ratio (305) on the sequence of encoder input frames. A number of encoder output frames generated as output from the encoder is reduced from a number of the encoder input frames received as input to the encoder by a factor proportional to the encoder reduction ratio applied by the stack of multi-head attention blocks. The method also includes decoding the sequence of encoder output frames into a sequence of output tokens (242) using a decoder (240) of the end-to-end model."
The patent application was internationally filed on Aug. 30, 2024, under International application No.PCT/US2024/044715.
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