MUMBAI, India, Aug. 22 -- Intellectual Property India has published a patent application (202517070605 A) filed by Advanced Micro Devices, Inc; and Ati Technologies Ulc, Santa Clara, U.S.A., on July 24, for 'buffer display data in a chiplet architecture.'
Inventor(s) include Phan, Gia Tung; Jain, Ashish; and Yang, Shang.
The application for the patent was published on Aug. 22, under issue no. 34/2025.
According to the abstract released by the Intellectual Property India: "An apparatus and method for efficiently managing power consumption among multiple, replicated functional blocks of an integrated circuit. An integrated circuit includes multiple, replicated functional blocks that use separate power domains. Data of a given type is stored in an interleaved manner among at least two of the multiple functional blocks. In one implementation, a prior static allocation determines that only a. subset of the functional blocks store the data of the given type. In another implementation, each of the functional blocks stores the data of the given ty pe, and when an idle state has occurred, data of the given type is moved between the multiple functional blocks until one or more functional blocks no longer store data of the given type. When a transition to the idle state has occurred, the functional blocks that do not store the data, of the given type are transitioned to a sleep state."
The patent application was internationally filed on Dec. 19, 2023, under International application No.PCT/US2023/084821.
Disclaimer: Curated by HT Syndication.
