Intellectual Property India Publishes Patent Application for 'Array Substrate, Display Panel, And Display Apparatus' Filed by Boe Technology Group Co. Ltd.; and Chengdu Boe Display Sci-Tech Co. Ltd.

MUMBAI, India, Oct. 11 -- Intellectual Property India has published a patent application (202517090378 A) filed by Boe Technology Group Co. Ltd.; and Chengdu Boe Display Sci-Tech Co. Ltd., Beijing, on Sept. 22, for 'array substrate, display panel, and display apparatus.'

Inventor(s) include Xiao, Feng; Chen, Gang; Yang, Guidong; Zhu, Wei; Qi, Xiaojing; Gao, Yujie; Shi, Xinping; Chen, Yinghui; and Deng, Yu.

The application for the patent was published on Oct. 10, under issue no. 41/2025.

According to the abstract released by the Intellectual Property India: "An array substrate (001), a display panel, and a display apparatus. The array substrate (001) comprises: a base substrate (100); a plurality of pixel electrodes (101) arranged in an array on the base substrate (100), wherein first gaps (GP1) extending in a first direction (X) and second gaps (GP2) extending in a second direction (Y) are provided between the pixel electrodes (101), and every two pixel electrodes (101) arranged in the first direction (X) serve as one pixel electrode group (PX); a plurality of gate lines (102) extending in the first direction (X) on the base substrate (100) and arranged in the second direction (Y), wherein orthographic projections of the gate lines (102) on the base substrate (100) at least partially overlap with orthographic projections of the first gaps (GP1) on the base substrate (100), and two gate lines (102) are included in a same first gap (GP1); and a first common electrode line (103), wherein an orthographic projection of the first common electrode line (103) on the base substrate (100) is located within the orthographic projections of the first gaps (GP1) and orthographic projections of the second gaps (GP2) between the pixel electrode groups (PX) on the base substrate (100); and where the first gap (GP1) does not overlap the second gap (GP2), the orthographic projection of the first common electrode line (103) on the base substrate (100) passes through, in the second direction (Y), an orthographic projection of a gap between the two gate lines (102) on the base substrate (100)."

The patent application was internationally filed on Dec. 19, 2023, under International application No.PCT/CN2023/139855.

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