MUMBAI, India, May 29 -- Intellectual Property India has published a patent application (202611048995 A) filed by Noida Institute Of Engineering & Technology, Greater Noida, Uttar Pradesh, on April 17, for 'an energy-efficient stack structure for embedded computing systems.'
Inventor(s) include Amita Pathania; and Chanchal Garg.
The application for the patent was published on May 29, under issue no. 22/2026.
According to the abstract released by the Intellectual Property India: "An energy-efficient stack structure for an embedded computing system includes a base support layer (101), a compute layer (102), a memory layer (103), an interface layer (104), a power regulation and gating module (105), an inter-layer connector framework (106), and a thermal dissipation assembly (107). The layers are vertically arranged so that computation, storage, communication, and power functions are coordinated with short electrical paths and selective activation. The structure reduces communication loss, standby consumption, and thermal buildup, thereby improving low-power embedded operation in compact electronic systems."
Disclaimer: Curated by HT Syndication.
