MUMBAI, India, Jan. 23 -- Intellectual Property India has published a patent application (202411058883 A) filed by Indraprastha Institute Of Information Technology, New Delhi, on Aug. 2, 2024, for 'an adaptive data retention voltage sensor for static random access memory (sram) array.'
Inventor(s) include Manish Tikyani; Dr Anuj Grover; and Dr Shouri Chatterjee.
The application for the patent was published on Jan. 23, under issue no. 04/2026.
According to the abstract released by the Intellectual Property India: "Disclosed herein is a data retention voltage (DRV) sensor cell (100) using 10T configuration comprising at least two pull-up transistors (P1 and P2) (102) and at least two pull-down transistors (N1 and N2) (104) arranged to form a pair of cross-coupled inverter. The sensor cell (100) comprising at least two access transistors (N3 and N4) (106) attached to the cross coupled inverter arrangement. The sensor cell (100) comprising a pair of bit lines (BL and BLB) (108) and a word line (WL) (110). The sensor cell (100) comprising at least two pull-up transistors (P12 and P22) (112) connected in parallel with the pull-up transistors (P1 and P2) (102), respectively. The sensor cell (100) comprising at least two pull-down transistors (N12 and N22) (114) connected in parallel with the pull-down transistors (N1 and N2) (104), respectively. The sensor cell (100) comprising at least one feedback (116) forming a loop."
Disclaimer: Curated by HT Syndication.
