MUMBAI, India, May 29 -- Intellectual Property India has published a patent application (202611051236 A) filed by Noida Institute Of Engineering And Technology, Greater Noida, Uttar Pradesh, on April 22, for 'a system and method for learnable channel permutation optimization in hardware-accelerated structured sparse neural-network processing.'
Inventor(s) include Ruchika; and Barkha Bhardwaj.
The application for the patent was published on May 29, under issue no. 22/2026.
According to the abstract released by the Intellectual Property India: "The present invention relates to a hardware-accelerated computing system (100) and method for optimizing structured sparsity in neural networks using learnable channel permutation. The system (100) includes a permutation cost predictor module (101) implemented on a hardware processor (102) with memory architecture (103), generating a cost matrix (104) that quantifies channel swapping costs. A differentiable bipartite matching solver (105), connected via a high-speed data bus (106), converts the cost matrix into binary permutation matrices (107) using entropy-regularized Sinkhorn iterations. A structured sparsity mask generator (108) applies N:M sparsity constraints to the permuted weights, enabling efficient model compression. The system supports accelerated inference on sparse tensor processing units (109) with minimal accuracy loss."
Disclaimer: Curated by HT Syndication.
