Intellectual Property India Publishes Patent Application for 'A Bridgeless Power Factor Correction Circuit For Reducing Electromagnetic Interference' Filed by Power Integrations, Inc.

MUMBAI, India, March 14 -- Intellectual Property India has published a patent application (202514077091 A) filed by Power Integrations, Inc., San Jose, U.S.A., on Aug. 13, 2025, for 'a bridgeless power factor correction circuit for reducing electromagnetic interference.'

Inventor(s) include Antonius Jacobus Johannes Werner; and Xingda Yan.

The application for the patent was published on March 13, under issue no. 11/2026.

According to the abstract released by the Intellectual Property India: "A bridgeless power factor correction (PFC) circuit for reducing electromagnetic interference (EMI) is disclosed herein. A current source is placed in parallel with a switch of a low frequency leg. The current source may be turned on during zero crossings of the AC input voltage to limit current and reduce the rate of change in voltage. In turn, EMI may be advantageously reduced without the need for large passive filters or complicated circuitry."

Disclaimer: Curated by HT Syndication.