MUMBAI, India, June 30 -- Intellectual Property India has published a patent application (202641073708 A) filed by Vellore Institute Of Technology on June 13, 2026, for “an Adaptive Hardware-Intrinsic Instruction Mutation And Execution Integrity System For Autonomous Cyber-Attack Prevention”.
Inventors include Thangaramya K; and Shanjai Kumar S.
The application for the patent was published on June 26, 2026, under issue no. 26/2026.
Abstract: The present invention relates to an adaptive hardware-intrinsic instruction mutation and execution integrity system for autonomous cyber-attack prevention is disclosed. The system employs an entropy-synchronization engine that generates a master entropy seed by fusing multiple hardware-intrinsic entropy sources, including device- specific and time-varying physical phenomena. A mutation engine positioned at a fetch-decode boundary dynamically transforms fetched instruction words into entropy-driven mutated representations using operations such as XOR masking and controlled bit permutation, while a corresponding inverse transformation engine at the decoder reconstructs the original instructions using the synchronized entropy seed. An entropy synchronization link ensures real-time consistency of the seed across the processor pipeline and memory subsystem. An autonomous integrity monitor validates reconstructed instructions based on opcode correctness, synchronization state, and decode-stage consistency. Upon detection of anomalies indicative of unauthorized or malformed execution, a secure halt control initiates protective actions including pipeline flush, latch clearing, program counter reset, execution halt, or clock gating. The invention thereby enables runtime instruction obfuscation and pre- execution validation using hardware-intrinsic entropy, effectively preventing cyber-attacks through proactive and autonomous enforcement of execution integrity. Fig 1 to 3.
Disclaimer: Curated by HT Syndication.
